MIPS Products

ASIC & Turnkey Solutions

In addition to our licensing model we are happy to engage on a model whereby we deliver you a complete silicon solution, either or a turnkey or ASIC basis.

Flexible Mixed-Signal IP Platform Architecture (FLEMIA ™ )

Providing Unprecendented Analog Integration

MIPS Technologies industry's first Flexible Mixed-Signal IP Platform Architecture™ (FLEMIA™ ) is a highly innovative approach to integrating multiple blocks of analog functionality into a single chip to streamline electronic system design.

Leveraging MIPS Technologies's extensive, silicon-proven portfolio of analog IP, the FLEMIA™ platform offers an unprecedented level of analog circuit integration and configurability for electronic communication and consumer applications, addressing the particular needs in mobile imaging, communication, computing and multimedia applications.

The FLEMIA™ platform leverages MIPS Technologies's broad expertise in leading-edge power management, audio and USB IP, and allows customers to choose the specific functionality needed to address system demands. MIPS Technologies customizes the mixed-signal architecture to customers’ specifications and makes it production ready for many of the industry's leading foundries.

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The platform allows system designers to bypass the time-consuming and expensive process of integrating multiple, discrete analog components and IP cores and helps simplify system design to improve reliability.

Supported by a complete demonstration tool, a software emulation tool and a Hardware Abstraction Layer (HAL), customers have today the capability to experience and test MIPS Technologies's IP's on a complete functional device.

A selection of silicon proven Power Management, Audio and USB IP's

Based on the most demanded analog IP's used in the mobile or portable market space, the FLEMIA offers a selection of the following IP's:

— Array of smart buck, boost or buck/boost DCDC converters and LDO's, where all power supplies are preset at a certain user-defined voltage, but can be changed in small stepping values through serial bus commands from the host processor, allowing Dynamic Voltage Management.

Programmable battery charger charges a Lithium-Ion or Lithium-Polymer battery from USB or AC adapter sources. Optional backup battery can be implemented.

Crystal oscillator with PLL's generating internal clocks and programmable master clocks, allowing for Dynamic Clock Scaling. Real Time Clock with 32 kHz crystal oscillator.

— Array of open-drain GPIO ports with optional debounce filters, pulse width modulators and LED modulators support a highly integrated and flexible PM platform solution.

— Array of Programmable and pulse-width-modulated current sinks allow for light intensity regulation of parallel white LED's for background illumination of multiple LCD screens. An integrated charge pump delivers power to the white LED's and is capable of generating a 5V VBUS signal in USB OTG host mode.

— A Touch resistive screen interface supported by a 12 bit Successive Approximation Register Analog-to-Digital Converter.

— Line-in, auxiliary-in and microphone inputs digitized in a high performance stereo audio Sigma-Delta Analog-to-Digital Converter with sample rates from 8 to 96 kHz.

Dual I2S/PCM interfaces with digital mixing for easy connection to communications and applications processors.

Stereo line out, stereo single-ended 2x40mW headphone amplifiers and stereo differential 2x500mW output amplifiers are connected to a high performance stereo audio Sigma-Delta Digital-to-Analog Converter.

— Complete PHY for USB2.0 On-The-Go applications with a ULPI v1.1 compliant Phy/Link interface is provided, supporting High Speed (480Mbps), Full Speed (12Mbps) and Low Speed (1.5Mbps) serial bit rates. Support is included for Mini USB Analog Car kit applications conforming to CEA-936A spec.

Interfaces to USIM and data storage devices (e.g. SD/SDIO/MMC memory cards or CE-ATA hard disks) with dedicated power supply inputs provide level shifting of digital signals to and from the host processor.

Optimized for low power consumption applications

The FLEMIA™ is optimized for low power consumption, uses few and low-cost external components and is realized in a low-cost CMOS process.

The inherent IP blocks have the capability to operate in ECO mode (where big transistors are shut off and replaced by narrower ones) allowing a lesser quiescent current. But have also the capability to be turned down, disappearing virtually from the FLEMIA™ in order to improve further in a lower quiescent current.

A unique and Complete Evaluation Tool vehicle

A perfect tool to evaluate the inherent analog IP blocks, gives customers the possibility to "taste" MIPS Technologies's Flexible Mixed-Signal Platform capability embedding its standard IP portfolio.

It's the best way to correctly understand the functionality and reach of each independent IP block before engaging to the final decision to go for a complete or partial design phase, offering a significant time reduction in the feasibility phase in the design phase.

It is delivered with a complete set of the FLEMIA™ documentation and completed with configuration files and guidance presentations.


A user friendly software emulating tool

Running on a standard PC configuration, this user friendly graphical tool emulates the functionality of a SOC communicating with the FLEMIA™.

Each individual and inherent IP block being addressable through the I²C port, allowing the user to easily evaluate its offering and capabilities.

The user can enable the internal 5-band equalizer, modify each separate cutting frequency, adapt the gain of each individual amplification stage of the audio codec and enable or disable the internal 3D sound DSP processor in order to expand the musical volume (picture below).


A device ready to be interfaced and driven by any operating system

The Application software or the customer's own application code running under operating software uses the Hardware Abstraction Layer (HAL) to communicate with the FLEMIA™.

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Provided by MIPS Technologies in a pure ANSI-style C code, the Hardware Abstraction Layer (HAL) hides all the HW implementation details from the application SW by generating a generic and tested interface to the FLEMIA™ specific to the application's hardware platform.

MIPS Technologies is indeed capable to provide, for each of the customer's specific FLEMIA™ generation, a seamless control and communication flow under any operating or application software.

For further details please contact sales@MIPS.com.